Group: comp.os.linux.hardware


Subject: Does memory CL timing change when Mhz drops for compatibility?
From: AZ Nomad
Date: 10/8/2007 6:18:05 AM
On Sun, 07 Oct 2007 18:04:04 GMT, Mike <mike@localhost.localdomain> wrote: >I just put in a pair of Ballistix DDR PC3200 CL2 in my Dell Optiplex >GX270 (with 800 Mhz FSB) and the BIOS says its running them at 333 Mhz. >I've since concluded that this machine can only run PC3200 at CL3 but >what I want to know is what CL is it running at 333Mhz? This machine >originally had a pair of 333Mhz CL2.5 and that was my first guess as to >what it was running the PC3200 at but when I put in all four cards then >it drops to 266Mhz. How can I see what the CL timing is for each of >these configurations? CL refers to wait states. It has nothing to do with clock speed. There's a small chip (I2C interface?) on the memory module that is supposed to contain timing information. You shouldn't mix memory modules with different timing and some chipsets/BIOS will do better than others at handling the timing issue. You should be able to view the CL timing in the memory page of your BIOS. Usually there's one setting for the entire system. I've never seen a BIOS bright enough to have separate timing for each bank of memory.

Subject: Does memory CL timing change when Mhz drops for compatibility?
From: anton@mips.complang.tuwien.ac.at (Anton Ertl)
Date: 10/9/2007 7:11:02 AM
Mike <mike@localhost.localdomain> writes: >I'm still trying to understand exactly >what the CL number means, I thought it was the number of clock cycles >such that doubling the mhz or halving the CL is the same. There's a series on memory on lwn.net. The first part explains CL and other latencies. - anton -- M. Anton Ertl Some things have to be seen to be believed anton@mips.complang.tuwien.ac.at Most things have to be believed to be seen http://www.complang.tuwien.ac.at/anton/home.html